This relates generally to microprocessors.
One way that microprocessors improve performance is to use a branch prediction unit. A branch prediction unit attempts to determine which way an execution sequence will branch so that instructions may be pre-fetched along the predicted path. This may improve speed and performance.
Typically, microprocessors are designed to prevent a core from executing instructions down the wrong program path. For this reason, branch prediction units include a branch predictor that predicts the direction of a branch and a branch target buffer that predicts the target of a taken branch. For example, a Pentium® processor employs a 256 entry 4-way set associated branch prediction buffer in the decode stage with each entry augmented with a 2-bit branch predictor. The branch predictor is typically implemented using static random access memories. Typically, 16 kilobytes or even larger static random access memory is needed, with the branch predictor and branch target buffer employing roughly half of the branch prediction unit area.
Embedded processors are typically used for microcontrollers, smart phones, tablet computers, and other mobile applications. The branch prediction unit adds a significant amount of power consumption and consumes a significant amount of area on the core in embedded processors. This power and area consumption is more of an issue with relatively small embedded processors.